Port bit reset register (GPIOx_BRR) (x=A..G)
Регистр побитового сброса выходных данных
Смещение (Address offset): 0x14
Reset value: 0x0000'0000
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
Reserved | |||||||
--- | --- | --- | --- | --- | --- | --- | --- |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved | |||||||
--- | --- | --- | --- | --- | --- | --- | --- |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
BR15 | BR14 | BR13 | BR12 | BR11 | BR10 | BR9 | BR8 |
w | w | w | w | w | w | w | w |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BR7 | BR6 | BR5 | BR4 | BR3 | BR2 | BR1 | BR0 |
w | w | w | w | w | w | w | w |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 31:16
Reserved
Reserved, must be kept at reset value
Зарезервировано. Должно быть сохранено значение после сброса
Bit 15:0
BRy
Port x Reset bit y (y= 0 .. 15)
Бит сброса данных выходного порта
Доступны только на запись и только в 32-битном (Word mode) режиме.
0 : нет действий
1 : сброс соответствующего бита выходных данных ODRy
/******************* Bit definition for GPIO_BRR register *******************/
#define GPIO_BRR_BR0 ((uint16_t)0x0001) /* Port x Reset bit 0 */
#define GPIO_BRR_BR1 ((uint16_t)0x0002) /* Port x Reset bit 1 */
#define GPIO_BRR_BR2 ((uint16_t)0x0004) /* Port x Reset bit 2 */
#define GPIO_BRR_BR3 ((uint16_t)0x0008) /* Port x Reset bit 3 */
#define GPIO_BRR_BR4 ((uint16_t)0x0010) /* Port x Reset bit 4 */
#define GPIO_BRR_BR5 ((uint16_t)0x0020) /* Port x Reset bit 5 */
#define GPIO_BRR_BR6 ((uint16_t)0x0040) /* Port x Reset bit 6 */
#define GPIO_BRR_BR7 ((uint16_t)0x0080) /* Port x Reset bit 7 */
#define GPIO_BRR_BR8 ((uint16_t)0x0100) /* Port x Reset bit 8 */
#define GPIO_BRR_BR9 ((uint16_t)0x0200) /* Port x Reset bit 9 */
#define GPIO_BRR_BR10 ((uint16_t)0x0400) /* Port x Reset bit 10 */
#define GPIO_BRR_BR11 ((uint16_t)0x0800) /* Port x Reset bit 11 */
#define GPIO_BRR_BR12 ((uint16_t)0x1000) /* Port x Reset bit 12 */
#define GPIO_BRR_BR13 ((uint16_t)0x2000) /* Port x Reset bit 13 */
#define GPIO_BRR_BR14 ((uint16_t)0x4000) /* Port x Reset bit 14 */
#define GPIO_BRR_BR15 ((uint16_t)0x8000) /* Port x Reset bit 15 */