ADC regular sequence register 2 (ADC_SQR2)

Второй регистр назначения регулярных каналов АЦП STM32F10x

Смещение (Address offset): 0x30

Reset value: 0x0000'0000

31	30	29	28	27	26	25	24
Reserved		SQ12[4:0]					SQ11[4]
---		rw					rw
0	0	0	0	0	0	0	0

23	22	21	20	19	18	17	16
SQ11[3:0]				SQ10[4:1]
rw				rw
0	0	0	0	0	0	0	0

15	14	13	12	11	10	9	8
SQ10[0]	SQ9[4:0]					SQ8[4:3]
rw	rw					rw
0	0	0	0	0	0	0	0

7	6	5	4	3	2	1	0
SQ8[2:0]			SQ7[4:0]
rw			rw
0	0	0	0	0	0	0	0

Биты

Имя

Описание

31:30

Reserved

Must be kept at reset value

Зарезервировано. Должно быть сохранено значение после сброса

29:25

SQ12[4:0]

12th conversion in regular sequence

Назначает 12-му каналу в группе регулярных каналов номер входного канала

Номера входных каналов от 0 до 15 (от ADC_IN0 до ADC_IN15) - внешние входы.

ADC1: ADC_IN16 - датчик температуры, ADC_IN17 - опорное напряжение.

ADC2: ADC_IN16, ADC_IN17 - подключены к Vss ("земля").

ADC3: ADC_IN9, ADC_IN14, ADC_IN15, ADC_IN16, ADC_IN17 - подключены к Vss ("земля").

Назначения остальным каналам производятся аналогично.

//- stm32f10x.h

/*******************  Bit definition for ADC_SQR2 register  *******************/

#define  ADC_SQR2_SQ7        ((uint32_t)0x0000001F)     /* SQ7[4:0] bits (7th conversion in regular sequence) */
#define  ADC_SQR2_SQ7_0      ((uint32_t)0x00000001)     /* Bit 0 */
#define  ADC_SQR2_SQ7_1      ((uint32_t)0x00000002)     /* Bit 1 */
#define  ADC_SQR2_SQ7_2      ((uint32_t)0x00000004)     /* Bit 2 */
#define  ADC_SQR2_SQ7_3      ((uint32_t)0x00000008)     /* Bit 3 */
#define  ADC_SQR2_SQ7_4      ((uint32_t)0x00000010)     /* Bit 4 */

#define  ADC_SQR2_SQ8        ((uint32_t)0x000003E0)     /* SQ8[4:0] bits (8th conversion in regular sequence) */
#define  ADC_SQR2_SQ8_0      ((uint32_t)0x00000020)     /* Bit 0 */
#define  ADC_SQR2_SQ8_1      ((uint32_t)0x00000040)     /* Bit 1 */
#define  ADC_SQR2_SQ8_2      ((uint32_t)0x00000080)     /* Bit 2 */
#define  ADC_SQR2_SQ8_3      ((uint32_t)0x00000100)     /* Bit 3 */
#define  ADC_SQR2_SQ8_4      ((uint32_t)0x00000200)     /* Bit 4 */

#define  ADC_SQR2_SQ9        ((uint32_t)0x00007C00)     /* SQ9[4:0] bits (9th conversion in regular sequence) */
#define  ADC_SQR2_SQ9_0      ((uint32_t)0x00000400)     /* Bit 0 */
#define  ADC_SQR2_SQ9_1      ((uint32_t)0x00000800)     /* Bit 1 */
#define  ADC_SQR2_SQ9_2      ((uint32_t)0x00001000)     /* Bit 2 */
#define  ADC_SQR2_SQ9_3      ((uint32_t)0x00002000)     /* Bit 3 */
#define  ADC_SQR2_SQ9_4      ((uint32_t)0x00004000)     /* Bit 4 */

#define  ADC_SQR2_SQ10       ((uint32_t)0x000F8000)     /* SQ10[4:0] bits (10th conversion in regular sequence) */
#define  ADC_SQR2_SQ10_0     ((uint32_t)0x00008000)     /* Bit 0 */
#define  ADC_SQR2_SQ10_1     ((uint32_t)0x00010000)     /* Bit 1 */
#define  ADC_SQR2_SQ10_2     ((uint32_t)0x00020000)     /* Bit 2 */
#define  ADC_SQR2_SQ10_3     ((uint32_t)0x00040000)     /* Bit 3 */
#define  ADC_SQR2_SQ10_4     ((uint32_t)0x00080000)     /* Bit 4 */

#define  ADC_SQR2_SQ11       ((uint32_t)0x01F00000)     /* SQ11[4:0] bits (11th conversion in regular sequence) */
#define  ADC_SQR2_SQ11_0     ((uint32_t)0x00100000)     /* Bit 0 */
#define  ADC_SQR2_SQ11_1     ((uint32_t)0x00200000)     /* Bit 1 */
#define  ADC_SQR2_SQ11_2     ((uint32_t)0x00400000)     /* Bit 2 */
#define  ADC_SQR2_SQ11_3     ((uint32_t)0x00800000)     /* Bit 3 */
#define  ADC_SQR2_SQ11_4     ((uint32_t)0x01000000)     /* Bit 4 */

#define  ADC_SQR2_SQ12       ((uint32_t)0x3E000000)     /* SQ12[4:0] bits (12th conversion in regular sequence) */
#define  ADC_SQR2_SQ12_0     ((uint32_t)0x02000000)     /* Bit 0 */
#define  ADC_SQR2_SQ12_1     ((uint32_t)0x04000000)     /* Bit 1 */
#define  ADC_SQR2_SQ12_2     ((uint32_t)0x08000000)     /* Bit 2 */
#define  ADC_SQR2_SQ12_3     ((uint32_t)0x10000000)     /* Bit 3 */
#define  ADC_SQR2_SQ12_4     ((uint32_t)0x20000000)     /* Bit 4 */